forked from Shiloh/githaven
105 lines
1.7 KiB
ArmAsm
105 lines
1.7 KiB
ArmAsm
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// +build !go1.9
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// +build amd64,!appengine
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TEXT ·hasAsm(SB),4,$0-1
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MOVQ $1, AX
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CPUID
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SHRQ $23, CX
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ANDQ $1, CX
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MOVB CX, ret+0(FP)
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RET
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#define POPCNTQ_DX_DX BYTE $0xf3; BYTE $0x48; BYTE $0x0f; BYTE $0xb8; BYTE $0xd2
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TEXT ·popcntSliceAsm(SB),4,$0-32
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XORQ AX, AX
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MOVQ s+0(FP), SI
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MOVQ s_len+8(FP), CX
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TESTQ CX, CX
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JZ popcntSliceEnd
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popcntSliceLoop:
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BYTE $0xf3; BYTE $0x48; BYTE $0x0f; BYTE $0xb8; BYTE $0x16 // POPCNTQ (SI), DX
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ADDQ DX, AX
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ADDQ $8, SI
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LOOP popcntSliceLoop
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popcntSliceEnd:
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MOVQ AX, ret+24(FP)
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RET
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TEXT ·popcntMaskSliceAsm(SB),4,$0-56
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XORQ AX, AX
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MOVQ s+0(FP), SI
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MOVQ s_len+8(FP), CX
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TESTQ CX, CX
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JZ popcntMaskSliceEnd
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MOVQ m+24(FP), DI
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popcntMaskSliceLoop:
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MOVQ (DI), DX
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NOTQ DX
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ANDQ (SI), DX
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POPCNTQ_DX_DX
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ADDQ DX, AX
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ADDQ $8, SI
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ADDQ $8, DI
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LOOP popcntMaskSliceLoop
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popcntMaskSliceEnd:
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MOVQ AX, ret+48(FP)
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RET
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TEXT ·popcntAndSliceAsm(SB),4,$0-56
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XORQ AX, AX
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MOVQ s+0(FP), SI
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MOVQ s_len+8(FP), CX
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TESTQ CX, CX
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JZ popcntAndSliceEnd
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MOVQ m+24(FP), DI
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popcntAndSliceLoop:
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MOVQ (DI), DX
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ANDQ (SI), DX
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POPCNTQ_DX_DX
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ADDQ DX, AX
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ADDQ $8, SI
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ADDQ $8, DI
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LOOP popcntAndSliceLoop
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popcntAndSliceEnd:
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MOVQ AX, ret+48(FP)
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RET
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TEXT ·popcntOrSliceAsm(SB),4,$0-56
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XORQ AX, AX
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MOVQ s+0(FP), SI
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MOVQ s_len+8(FP), CX
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TESTQ CX, CX
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JZ popcntOrSliceEnd
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MOVQ m+24(FP), DI
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popcntOrSliceLoop:
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MOVQ (DI), DX
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ORQ (SI), DX
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POPCNTQ_DX_DX
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ADDQ DX, AX
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ADDQ $8, SI
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ADDQ $8, DI
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LOOP popcntOrSliceLoop
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popcntOrSliceEnd:
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MOVQ AX, ret+48(FP)
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RET
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TEXT ·popcntXorSliceAsm(SB),4,$0-56
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XORQ AX, AX
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MOVQ s+0(FP), SI
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MOVQ s_len+8(FP), CX
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TESTQ CX, CX
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JZ popcntXorSliceEnd
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MOVQ m+24(FP), DI
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popcntXorSliceLoop:
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MOVQ (DI), DX
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XORQ (SI), DX
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POPCNTQ_DX_DX
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ADDQ DX, AX
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ADDQ $8, SI
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ADDQ $8, DI
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LOOP popcntXorSliceLoop
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popcntXorSliceEnd:
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MOVQ AX, ret+48(FP)
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RET
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